gem5
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inet.hh File Reference
#include <iosfwd>
#include <string>
#include <utility>
#include <vector>
#include "base/types.hh"
#include "dev/net/etherpkt.hh"
#include "dnet/os.h"
#include "dnet/eth.h"
#include "dnet/ip.h"
#include "dnet/ip6.h"
#include "dnet/addr.h"
#include "dnet/arp.h"
#include "dnet/icmp.h"
#include "dnet/tcp.h"
#include "dnet/udp.h"
#include "dnet/intf.h"
#include "dnet/route.h"
#include "dnet/fw.h"
#include "dnet/blob.h"
#include "dnet/rand.h"

Go to the source code of this file.

Classes

struct  Net::EthAddr
 
struct  Net::EthHdr
 
class  Net::EthPtr
 
struct  Net::IpAddress
 
struct  Net::IpNetmask
 
struct  Net::IpWithPort
 
struct  Net::IpHdr
 
class  Net::IpPtr
 
struct  Net::IpOpt
 
struct  Net::Ip6Hdr
 
class  Net::Ip6Ptr
 
struct  Net::ip6_opt_fragment
 
struct  Net::ip6_opt_routing_type2
 
struct  Net::ip6_opt_dstopts
 
struct  Net::ip6_opt_hdr
 
struct  Net::Ip6Opt
 
struct  Net::TcpHdr
 
class  Net::TcpPtr
 
struct  Net::TcpOpt
 
struct  Net::UdpHdr
 
class  Net::UdpPtr
 

Namespaces

 Net
 

Macros

#define HOME_ADDRESS_OPTION   0xC9
 

Functions

std::ostream & Net::operator<< (std::ostream &stream, const EthAddr &ea)
 
bool Net::operator== (const EthAddr &left, const EthAddr &right)
 
std::ostream & Net::operator<< (std::ostream &stream, const IpAddress &ia)
 
bool Net::operator== (const IpAddress &left, const IpAddress &right)
 
std::ostream & Net::operator<< (std::ostream &stream, const IpNetmask &in)
 
bool Net::operator== (const IpNetmask &left, const IpNetmask &right)
 
std::ostream & Net::operator<< (std::ostream &stream, const IpWithPort &iwp)
 
bool Net::operator== (const IpWithPort &left, const IpWithPort &right)
 
uint16_t Net::cksum (const IpPtr &ptr)
 
struct Net::ip6_opt_dstopts Net::__attribute__ ((packed))
 
uint16_t Net::cksum (const TcpPtr &tcp)
 
uint16_t Net::__tu_cksum6 (const Ip6Ptr &ip6)
 
uint16_t Net::__tu_cksum (const IpPtr &ip)
 
uint16_t Net::cksum (const UdpPtr &udp)
 
int Net::hsplit (const EthPacketPtr &ptr)
 

Variables

uint8_t type
 
uint8_t length
 
ip6_addr_t addr
 
uint8_t ext_nxt
 
uint8_t ext_len
 
union {
   struct ip6_opt_fragment   fragment
 
   struct ip6_opt_routing_type2   rtType2
 
   struct ip6_opt_dstopts   dstOpts
 
ext_data
 
Net::Ip6Opt Net::__attribute__
 

Macro Definition Documentation

◆ HOME_ADDRESS_OPTION

#define HOME_ADDRESS_OPTION   0xC9

Definition at line 463 of file inet.hh.

Variable Documentation

◆ addr

ip6_addr_t addr

Definition at line 335 of file inet.hh.

Referenced by PhysicalMemory::access(), BaseSetAssoc::accessBlock(), SimpleCache::accessTiming(), MipsSystem::addConsoleFuncEvent(), RiscvSystem::addConsoleFuncEvent(), AlphaSystem::addConsoleFuncEvent(), addressToInt(), DRAMCtrl::addToReadQueue(), DRAMCtrl::addToWriteQueue(), Cache::allocateBlock(), archPrctlFunc(), MipsProcess::argsInit(), ArmISA::ArmStaticInst::ArmStaticInst(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInst(), bitRemove(), AbstractController::blockOnQueue(), HsailISA::Call::calcAddr(), Packet::checkFunctional(), BaseRemoteGDB::cmd_clr_hw_bkpt(), BaseRemoteGDB::cmd_mem_r(), BaseRemoteGDB::cmd_mem_w(), BaseRemoteGDB::cmd_set_hw_bkpt(), BaseTags::computeStats(), Linux::ThreadInfo::curTaskInfo(), Linux::ThreadInfo::curThreadInfo(), DRAMCtrl::decodeAddr(), AlphaISA::StackTrace::decodePrologue(), PacketQueue::deferredPacketReadyTime(), BaseDynInst< Impl >::demapDataPage(), CheckerCPU::demapDataPage(), SparcISA::TLB::demapPage(), DMASequencer::descheduleDeadlockEvent(), IdeController::dispatchAccess(), GenericPciHost::dmaAddr(), Trace::IntelTraceRecord::dump(), ProfileNode::dump(), HsailISA::LdaInst< DestDataType, AddrOperandType >::execute(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execute(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execute(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execute(), RiscvSystem::fixFuncEventAddr(), MipsSystem::fixFuncEventAddr(), AlphaSystem::fixFuncEventAddr(), SparcSystem::fixFuncEventAddr(), ArmSystem::fixFuncEventAddr(), AlphaISA::TLB::flushAddr(), Gicv2m::frameFromAddr(), PhysicalMemory::functionalAccess(), RubySystem::functionalWrite(), Network::functionalWrite(), HsailISA::LdaInst< DestDataType, AddrOperandType >::generateDisassembly(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::generateDisassembly(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::generateDisassembly(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::generateDisassembly(), Linux::ThreadInfo::get_data(), Packet::getAddr(), RubyPort::MemSlavePort::getAddrRanges(), Gicv2m::getAddrRanges(), GenericTimerMem::getAddrRanges(), CacheMemory::getDataLatency(), GPUCoalescer::getFirstResponseToCompletionDelayHist(), BaseKvmCPU::getGuestData(), AtomicSimpleCPU::getInstPort(), TimingSimpleCPU::getInstPort(), CallArgMem::getLaneAddr(), Minor::LSQ::getLastMemBarrier(), RandomGen::getNextPacket(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::getNumOperands(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::getNumOperands(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::getOperandSize(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::getOperandSize(), System::getPhysMem(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::getRegisterIndex(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::getRegisterIndex(), AlphaISA::TLB::getsize(), Cache::handleFill(), PacketQueue::hasAddr(), ExecContext::initiateMemRead(), AbstractController::initNetworkPtr(), AlphaSystem::initState(), ArmLinuxProcess32::initState(), FreebsdArmSystem::initState(), LinuxArmSystem::initState(), LinuxAlphaSystem::initState(), AlphaISA::TLB::insert(), BaseTags::insertBlock(), BaseRemoteGDB::insertHardBreak(), intToAddress(), VIPERCoalescer::invL1(), VIPERCoalescer::invwbL1(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::isCondRegister(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::isCondRegister(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::isScalarRegister(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::isScalarRegister(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::isSrcOperand(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::isVectorRegister(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::isVectorRegister(), ArmISA::itState(), HsailISA::LdaInst< DestDataType, AddrOperandType >::LdaInst(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::LdInst(), SymbolTable::load(), ObjectFile::loadSection(), PseudoInst::loadsymbol(), ArmISA::MacroMemOp::MacroMemOp(), ArmISA::MacroVFPMemOp::MacroVFPMemOp(), BaseCache::markInService(), PortProxy::memsetBlob(), PhysicalMemory::name(), TraceCPU::FixedRetryGen::name(), ComputeUnit::nextLocRdBus(), BasePrefetcher::observeAccess(), ArmISA::TLBIMVAA::operator()(), ArmISA::TLBIMVA::operator()(), ArmISA::ITLBIMVA::operator()(), ArmISA::DTLBIMVA::operator()(), ArmISA::TLBIIPA::operator()(), TsunamiPChip::params(), BaseRemoteGDB::TrapEvent::process(), ArmISA::ProcessInfo::ProcessInfo(), AlphaISA::ProcessInfo::ProcessInfo(), ArmISA::purifyTaggedAddr(), NoMaliGpu::read(), VGic::read(), GenericTimerMem::read(), Pl390::read(), MC146818::readData(), AtomicSimpleCPU::readMem(), CheckerCPU::readMem(), ArmSemihosting::readString(), MessageBuffer::reanalyzeMessages(), MemCheckerMonitor::recvFunctional(), MemCheckerMonitor::recvFunctionalSnoop(), MemCheckerMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), MemCheckerMonitor::recvTimingResp(), RealViewCtrl::registerDevice(), RangeAddrMapper::remapAddr(), SecurePortProxy::SecurePortProxy(), SubBlock::setAddress(), AccessTraceForAddress::setAddress(), VirtQueue::VirtRing< struct vring_used_elem >::setAddress(), AlphaSystem::setAlphaAccess(), Prefetcher::setController(), LinuxAlphaSystem::setDelayLoop(), SETranslatingPortProxy::setProcess(), SnoopFilter::setSlavePorts(), setThreadAreaFunc(), LinuxAlphaSystem::setupFuncEvents(), AbstractController::stallBuffer(), MessageBuffer::stallMessage(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::StInst(), StorageSpace::StorageSpace(), StoreTrace::StoreTrace(), SubBlock::SubBlock(), RiscvISA::Decoder::takeOverFrom(), AlphaISA::StackTrace::trace(), Trace::ExeTracerRecord::traceInst(), SETranslatingPortProxy::tryReadString(), SETranslatingPortProxy::tryWriteString(), SymbolTable::unserialize(), X86ISA::vtophys(), SparcISA::vtophys(), AlphaISA::vtophys(), AbstractController::wakeUpAllBuffers(), AbstractController::wakeUpBuffers(), VIPERCoalescer::wbL1(), NoMaliGpu::write(), VGic::write(), GenericTimerMem::write(), Pl390::write(), Wavefront::writeCallArgMem(), MC146818::writeData(), AtomicSimpleCPU::writeMem(), CheckerCPU::writeMem(), AbstractBloomFilter::~AbstractBloomFilter(), AddrMapper::~AddrMapper(), GenericArmPciHost::~GenericArmPciHost(), GpuDispatcher::~GpuDispatcher(), and MemChecker::~MemChecker().

◆ dstOpts

struct ip6_opt_dstopts dstOpts

Definition at line 338 of file inet.hh.

◆ ext_data

union { ... } ext_data

◆ ext_len

uint8_t ext_len

Definition at line 334 of file inet.hh.

Referenced by Net::Ip6Opt::extlen().

◆ ext_nxt

uint8_t ext_nxt

Definition at line 333 of file inet.hh.

Referenced by Net::Ip6Opt::nxt().

◆ fragment

struct ip6_opt_fragment fragment

◆ length

uint8_t length

◆ rtType2

struct ip6_opt_routing_type2 rtType2

Definition at line 337 of file inet.hh.

◆ type

uint8_t type

Definition at line 333 of file inet.hh.

Referenced by __to_number(), CacheRecorder::addRecord(), ArmISA::TableWalker::LongDescriptor::af(), ArmISA::TableWalker::LongDescriptor::ap(), ArmISA::TableWalker::LongDescriptor::apTable(), ArmISA::ArmStaticInst::ArmStaticInst(), ArmISA::TableWalker::LongDescriptor::attrIndx(), AuxVector< IntType >::AuxVector(), broadcast(), GarnetNetwork::collateStats(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::completeAcc(), ArmISA::TableWalker::LongDescriptor::contiguousHint(), KvmVM::createDevice(), createMachineID(), ArmISA::TableWalker::LongDescriptor::dbgHeader(), ArmISA::TableWalker::LongDescriptor::domain(), ArmV8KvmCPU::dump(), findRegDataType(), ArmISA::MemoryReg64::generateDisassembly(), ArmISA::MicroIntRegXOp::generateDisassembly(), ArmISA::PMU::getCounterTypeRegister(), ArmISA::PMU::getCounterValue(), GPUCoalescer::getFirstResponseToCompletionDelayHist(), Sequencer::getIncompleteTimes(), Throttle::getMsgCount(), Switch::getMsgCount(), ArmV8KvmCPU::getSysRegMap(), ArmISA::TableWalker::LongDescriptor::global(), Sequencer::hitCallback(), GPUCoalescer::hitCallback(), Prefetcher::initializeStream(), Net::TcpOpt::isopt(), iGbReg::TxdOp::isType(), LaneData< LS >::LaneData(), Net::IpOpt::len(), Net::TcpOpt::len(), MachineTypeAndNodeIDToMachineID(), mapAddressToRange(), ArmISA::TableWalker::LongDescriptor::memAttr(), ArmISA::TableWalker::LongDescriptor::nextDescAddr(), ArmISA::TableWalker::LongDescriptor::nextTableAddr(), ArmISA::TableWalker::LongDescriptor::offsetBits(), VecLaneT< VecElem, Const >::operator VecElem(), LaneData< LS >::operator=(), VecLaneT< VecElem, Const >::operator=(), VecRegT< VecElem, NumElems, Const >::operator[](), Iob::params(), PerfKvmCounterConfig::PerfKvmCounterConfig(), ArmISA::TableWalker::LongDescriptor::pxn(), ArmISA::TableWalker::LongDescriptor::pxnTable(), Random::random(), Sequencer::recordMissLatency(), GPUCoalescer::recordMissLatency(), SimpleNetwork::regStats(), Switch::regStats(), Throttle::regStats(), BaseRemoteGDB::replaceThreadContext(), ArmISA::TableWalker::LongDescriptor::rw(), ArmISA::TableWalker::LongDescriptor::rwTable(), Sinic::Device::rxFilter(), NSGigE::rxFilter(), ArmISA::TableWalker::L1Descriptor::secure(), ArmISA::TableWalker::LongDescriptor::secure(), ArmISA::TableWalker::LongDescriptor::secureTable(), AccessTraceForAddress::setAddress(), Prefetcher::setController(), PipeFDEntry::setEndType(), Wavefront::setParent(), NetworkLink::setType(), ArmISA::TableWalker::LongDescriptor::sh(), to_lower(), BaseRemoteGDB::trap(), ElasticTrace::TraceInfo::typeToStr(), TraceCPU::ElasticDataGen::GraphNode::typeToStr(), ArmISA::TableWalker::LongDescriptor::user(), ArmISA::TableWalker::LongDescriptor::userTable(), VecLaneT< VecElem, Const >::VecLaneT(), VecRegT< VecElem, NumElems, Const >::VecRegT(), Iob::writeIob(), X86ISA::SMBios::SMBiosStructure::writeOut(), X86ISA::E820Table::writeTo(), ArmISA::TableWalker::LongDescriptor::xn(), ArmISA::TableWalker::LongDescriptor::xnTable(), and VecRegT< VecElem, NumElems, Const >::zero().


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