gem5.components.cachehierarchies.ruby.mesi_two_level_cache_hierarchy.html
gem5.components.cachehierarchies.ruby.mesi_two_level_cache_hierarchy module¶
- class gem5.components.cachehierarchies.ruby.mesi_two_level_cache_hierarchy.MESITwoLevelCacheHierarchy(l1i_size: str, l1i_assoc: int, l1d_size: str, l1d_assoc: int, l2_size: str, l2_assoc: int, num_l2_banks: int)¶
Bases:
AbstractRubyCacheHierarchy,AbstractTwoLevelCacheHierarchyA two level private L1 shared L2 MESI hierarchy.
In addition to the normal two level parameters, you can also change the number of L2 banks in this protocol.
The on-chip network is a point-to-point all-to-all simple network.
- abstract = False¶
- cxx_exports = []¶
- cxx_extra_bases = []¶
- cxx_param_exports = []¶
- cxx_template_params = []¶
- get_coherence_protocol()¶
Returns the coherence protocol used in the cache hierarchy.
- Returns:
The coherence protocol used in the cache hierarchy.
- incorporate_cache(board: AbstractBoard) None¶
Incorporates the caches into a board.
Each specific hierarchy needs to implement this function and will be unique for each setup.
- Parameters:
board – The board in which the cache heirarchy is to be incorporated.
- override_create = False¶