gem5.components.cachehierarchies.classic.two_level_fdp_cache_hierarchy module

class gem5.components.cachehierarchies.classic.two_level_fdp_cache_hierarchy.TwoLevelFDPCacheHierarchy(l1d_size: str, l1i_size: str, l2_size: str, l1d_assoc: int = 8, l1i_assoc: int = 8, l2_assoc: int = 16, decoupled: bool = True, membus: BaseXBar | None = None)

Bases: PrivateL1SharedL2CacheHierarchy

A two-level cache setup based on the PrivateL1SharedL2CacheHierarchy where each core has a private L1 Data and Instruction Cache, and a L2 cache is shared with all cores. Each instruction cache is equipped with fetch-direct prefetcher (FDP) and TaggedPrefetcher (next-line)

abstract = False

cxx_exports = []

cxx_extra_bases = []

cxx_param_exports = []

cxx_template_params = []

incorporate_cache(board: AbstractBoard) → None

Incorporates the caches into a board.

Each specific hierarchy needs to implement this function and will be unique for each setup.

Parameters:

board – The board in which the cache heirarchy is to be incorporated.

override_create = False