gem5.components.memory package

Subpackages

• gem5.components.memory.dram_interfaces package
  • Submodules
    • gem5.components.memory.dram_interfaces.ddr3 module
      • DDR3_1600_8x8
      • DDR3_2133_8x8
    • gem5.components.memory.dram_interfaces.ddr4 module
      • DDR4_2400_16x4
      • DDR4_2400_4x16
      • DDR4_2400_8x8
    • gem5.components.memory.dram_interfaces.ddr5 module
      • DDR5_4400_4x8
      • DDR5_6400_4x8
      • DDR5_8400_4x8
    • gem5.components.memory.dram_interfaces.gddr module
      • GDDR5_4000_2x32
    • gem5.components.memory.dram_interfaces.hbm module
      • HBM_1000_4H_1x128
      • HBM_1000_4H_1x64
      • HBM_2000_4H_1x64
    • gem5.components.memory.dram_interfaces.hmc module
    • gem5.components.memory.dram_interfaces.lpddr2 module
      • LPDDR2_S4_1066_1x32
    • gem5.components.memory.dram_interfaces.lpddr3 module
      • LPDDR3_1600_1x32
    • gem5.components.memory.dram_interfaces.lpddr5 module
      • LPDDR5_5500_1x16_8B_BL32
      • LPDDR5_5500_1x16_BG_BL16
      • LPDDR5_5500_1x16_BG_BL32
      • LPDDR5_6400_1x16_8B_BL32
      • LPDDR5_6400_1x16_BG_BL16
      • LPDDR5_6400_1x16_BG_BL32
    • gem5.components.memory.dram_interfaces.wideio module
      • WideIO_200_1x128
  • Module contents

Submodules

• gem5.components.memory.abstract_memory_system module
  • AbstractMemorySystem
    • AbstractMemorySystem.abstract
    • AbstractMemorySystem.cxx_exports
    • AbstractMemorySystem.cxx_extra_bases
    • AbstractMemorySystem.cxx_param_exports
    • AbstractMemorySystem.cxx_template_params
    • AbstractMemorySystem.get_mem_interfaces()
    • AbstractMemorySystem.get_mem_ports()
    • AbstractMemorySystem.get_memory_controllers()
    • AbstractMemorySystem.get_size()
    • AbstractMemorySystem.get_uninterleaved_range()
    • AbstractMemorySystem.incorporate_memory()
    • AbstractMemorySystem.override_create
    • AbstractMemorySystem.set_memory_range()
• gem5.components.memory.dramsim_3 module
• gem5.components.memory.dramsys module
• gem5.components.memory.hbm module
  • HBM2Stack()
  • HighBandwidthMemory
    • HighBandwidthMemory.abstract
    • HighBandwidthMemory.cxx_exports
    • HighBandwidthMemory.cxx_extra_bases
    • HighBandwidthMemory.cxx_param_exports
    • HighBandwidthMemory.cxx_template_params
    • HighBandwidthMemory.get_mem_interfaces()
    • HighBandwidthMemory.get_mem_ports()
    • HighBandwidthMemory.override_create
• gem5.components.memory.memory module
  • ChanneledMemory
    • ChanneledMemory.abstract
    • ChanneledMemory.cxx_exports
    • ChanneledMemory.cxx_extra_bases
    • ChanneledMemory.cxx_param_exports
    • ChanneledMemory.cxx_template_params
    • ChanneledMemory.get_mem_interfaces()
    • ChanneledMemory.get_mem_ports()
    • ChanneledMemory.get_memory_controllers()
    • ChanneledMemory.get_size()
    • ChanneledMemory.get_uninterleaved_range()
    • ChanneledMemory.incorporate_memory()
    • ChanneledMemory.override_create
    • ChanneledMemory.set_memory_range()
• gem5.components.memory.multi_channel module
  • DualChannelDDR3_1600()
  • DualChannelDDR3_2133()
  • DualChannelDDR4_2400()
  • DualChannelLPDDR3_1600()
• gem5.components.memory.simple module
  • SingleChannelSimpleMemory
    • SingleChannelSimpleMemory.abstract
    • SingleChannelSimpleMemory.cxx_exports
    • SingleChannelSimpleMemory.cxx_extra_bases
    • SingleChannelSimpleMemory.cxx_param_exports
    • SingleChannelSimpleMemory.cxx_template_params
    • SingleChannelSimpleMemory.get_mem_ports()
    • SingleChannelSimpleMemory.get_memory_controllers()
    • SingleChannelSimpleMemory.get_size()
    • SingleChannelSimpleMemory.incorporate_memory()
    • SingleChannelSimpleMemory.override_create
    • SingleChannelSimpleMemory.set_memory_range()
• gem5.components.memory.single_channel module
  • DIMM_DDR5_4400()
  • DIMM_DDR5_6400()
  • DIMM_DDR5_8400()
  • SingleChannelDDR3_1600()
  • SingleChannelDDR3_2133()
  • SingleChannelDDR4_2400()
  • SingleChannelHBM()
  • SingleChannelLPDDR3_1600()

Module contents