gem5 Workshop at ISCA 2025


Call for Participation

The gem5 Workshop at ISCA 2025 brought together the community for a full day of discussions, presentations, and collaboration centered around the gem5 computer architecture simulator. The event featured presentations on research, new features, and community developments.

Event Information

📍 Venue: Waseda University - Waseda Campus, Tokyo, Japan Okuma Auditorium (Small) 📅 Date: June 22, 2025
⏰ Time: 8:00 AM – 3:00 PM

Event Schedule and Presentations

Time Session Video Slides
08:00 Welcome Presentation by Jason Lowe-Power (Google/UC Davis) Video  
08:20 PinCPU: Fast-Forwarding Simulations with Dynamic Binary Instrumentation, by Nicholas Mosier (Stanford), Hamed Nemati (KTH), John C. Mitchell (Stanford), Caroline Trippel (Stanford)   Slides
08:40 gem5-CXL: A Full-System Multi-Host Simulation Infrastructure, by Leonardo Redivo, Mahyar Samani, William Shaddix, Venkatesh Akella, Jason Lowe-Power (UC Davis) Video Slides
09:00 gem5-dbc: A Declarative Benchmark Configuration Framework for Architectural Exploration with gem5, by Carlos Falquez, Nam Ho, Estela Suarez, Fabian Schätzle (FZJ), Antoni Portero (BSC), Dirk Pleiter (U Groningen) Video  
09:20 Implementing Support for Extensible Power Modeling in gem5, by Alex Smith, Matt Sinclair (University of Wisconsin-Madison) Video Slides
09:40 Unwinding simulated function stacks in gem5, by Rashid Aligholipour, Johan Söderström, Yuan Yao (Uppsala), Peter Munch (TU Berlin) Video  
10:00 Coffee Break (30 minutes)    
10:30 Anatomy of the gem5 simulator, by Johan Söderström, Rashid Aligholipour, Yuan Yao (Uppsala) Video  
10:50 ProtoSLICC: Automated Synthesis of Gem5-based Cache Coherence Controllers, by Nicolò Carpentieri, Anatole Lefort, David Schall, Pramod Bhatotia (TUM) Video  
11:10 SecureView: Visualizing Defense against Transient Execution Side Channels, by Philipp Schmitz, Tobias Jauch, Alex Wezel, Dominik Stoffel, Wolfgang Kunz (RPTU), Mohammad Fadiheh (Stanford), Thore Tiemann, Jonah Heller, Thomas Eisenbarth (LĂĽbeck) Video Slides
11:30 Toward Full-System Heterogeneous Simulation: Merging gem5-SALAM with Mainline gem5, by Akanksha Chaudhari, Matt Sinclair (UW-Madison) Video Slides
12:00 Community Luncheon Note: There is no food in the Auditorium    
13:30 A Top-Down Methodology for gem5, by Osman Yaşar, David Schall, Pramod Bhatotia (TUM) Video  
13:50 The RISC-V Hypervisor Extension in gem5, by Nikos Karystinos, George-Marios Fragkoulis, Dimitris Gizopoulos (Athens), George Papadimitriou (Patras) Video Slides
14:10 Narrowing the GAP: Enhancing gem5’s GPU Memory Bandwidth Accuracy, by Yu Xia, Vishnu Ramadas, Matthew Poremba (AMD), Matthew D. Sinclair (UW-Madison) Video Slides
14:30 Closing Remarks Video  
       

Contact Us

If you have any questions about this event, please don’t hesitate to reach out to the organizer Bobby R. Bruce at bbruce@ucdavis.edu.